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During the AMD Computex 2024 keynote, AMD CEO Dr. Lisa Su officially introduced and announced the company’s next-generation Ryzen processors. Today marks the first reveal of AMD’s long-awaited Zen 5 microarchitecture through the Ryzen 9000 series, which is set to bring several improvements over Zen 4 and the desktop Ryzen 7000 series, which will launch sometime in July 2024.

AMD introduced four new chip SKUs using its Zen 5 microarchitecture. The AMD Ryzen 9 9950X processor will be the new consumer flagship, featuring 16 CPU cores and a fast maximum boost frequency of 5.7 GHz. Other SKUs include 6, 8, and 12 cores, giving users a diverse mix of core and thread counts. All four of these initial chips will be X-series chips, meaning they will have unlocked multipliers and higher TDP/clock speeds.

In terms of performance, AMD is touting an average (geomean) IPC increase on desktop workloads for Zen 5 of 16%. And since the turbo clock speeds of the new Ryzen desktop chips remain largely identical to their Ryzen 7000 predecessors, that should translate into similar performance expectations for the new chips.

The AMD Ryzen 9000 series will also be launched on the AM5 socket, which debuted with AMD’s Ryzen 7000 series and marks AMD’s commitment to socket/platform longevity. Along with the Ryzen 9000 series will come a pair of new high-performance chipsets: the X870E (Extreme) and the regular X870 chipsets. The main features that manufacturers will integrate into their specific motherboards remain silent. However, we do know that USB 4.0 ports are standard on the X870E/X870 boards, along with PCIe 5.0 for both PCIe graphics and NVMe storage, with expected higher AMD EXPO memory profile support than previous generations.

AMD Ryzen 9000: Bringing Zen 5 to 16C/32T on Desktop

Zen 5 is AMD’s latest advancement in the Ryzen microarchitecture. Although AMD hasn’t revealed many technical details, we do know some of the brand new features that Zen 5 will offer.

Looking at the architectural differences between the last few generations (Zen 4 and Zen 3) and Zen 5, we know that AMD is using a new manufacturing process for its Ryzen 9000 desktop chips. While many are touting and speculating that the desktop Zen 5 will be built on one of TSMC’s N3 (3nm) nodes, some of our sources say that the Zen 5 CCD will be built on TSMC’s N4 – although we’re awaiting official confirmation for that (Update: And TSMC 4nm is now confirmed for the consumer Ryzen CCD). Additionally, AMD’s mobile offering, the Ryzen AI 300 (Strix Point) series is confirmed for 4nm, and we’ve yet to see an AMD desktop CPU die manufactured on a more advanced node than its mobile counterpart.

While AMD didn’t offer a deep dive into the Zen 5 architecture at Computex, the company did touch on some of the major architectural improvements over Zen 4 that will come with the new CPU architecture. They start with an improved branch predictor that is designed to offer better accuracy, efficiency, and reduced overall instruction cycle latency. The Zen 5 architecture also boasts higher performance with wider pipelines and SIMD, which allows for faster data processing and equates to better overall performance in benchmarks like CineBench and Blender and workloads using the suite from AVX-512 instructions.

Additionally, Zen 5 introduces a deeper window size for out-of-order instructions throughout its design, allowing for more parallelism and better processing of multiple instructions in the pipeline at the same time.

There are also several points within the Zen 5 architecture where AMD has doubled the resources or performance. The memory bandwidth from L2 to L1 is one such example, which gives the cache hierarchy a large increase in bandwidth that should allow for faster data transfer within individual processor cores. AMD also claims better AI performance on AVX-512 pins and workloads. It should be noted that AMD’s support for AVX-512 on Zen 4 was implemented using a 256-bit SIMD for 2 cycles, so this may be a sign that AMD has expanded its AVX-512 SIMD to a full 512 bits wide in the Zen 5 architecture.

These improvements collectively aim to deliver significant performance improvements over the previous Zen 4 microarchitecture, with AMD touting an average (geomean) 16% increase in IPC over Zen 4 on desktop workloads. However, it should be noted that the best result in this collection of benchmarks is in the GeekBench 5.3 AES XTS benchmark, which uses the VAES512 and VAES256 extensions of the AVX-512 instruction set. So if AMD made significant changes to their vector SIMDs for Zen 5, that would significantly affect this benchmark in particular.

Above is a render of a Ryzen 9000 series dual-core complex die (CCD) chip that depicts the silicon composition and layout. As with previous generations of Ryzen processors, there is a large central I/O matrix (IOD) through which all I/O and memory operations are routed. AMD doesn’t disclose the process node used to create it, and it’s unclear if AMD even uses a new IOD for the Ryzen 9000 generation. As for the CCD, each die again contains 8 CPU cores, with AMD equipping the Ryzen chips with either 1 or 2 CCDs depending on the SKU. Previous Zen 5 roadmaps have indicated that AMD will use a mix of 4nm and 3nm processes here, and so far AMD hasn’t revealed which one is being used for the base Zen 5 CCD – although the TSMC N4 seems the most likely candidate.

AMD’s Ryzen 9000 chips will also have similar memory support to their predecessors, with AMD sticking with DDR5. However, AMD notes that the incoming X870E and X870 motherboard chipsets will allow for faster EXPO memory profiles than seen on Zen 4. At this time, AMD has not disclosed the JEDEC memory specification of the four Ryzen 9000 SKUs that announced today. However, we expect to know more before the launch of the Ryzen 9000 family in July 2024.

AMD’s announcement of Zen 5 for desktop and the upcoming Ryzen 9000 offer four X-series SKUs at launch, allowing overclocking and coming with unlocked CPU multipliers. The flagship SKU, the Ryzen 9 9950X, features 16 cores, a maximum clock speed of up to 5.7 GHz, 80 MB cache split between 64 MB for L3 and 16 MB for L2 (1 MB per L2 core), and a 170 W TDP . The Ryzen 9 9900X offers 12 cores, a maximum clock speed of up to 5.6 GHz, 64 MB L3 cache and a 120 W TDP.

Moving down the Ryzen 9000 stack is the Ryzen 7 9700X, which comes with 8 cores, a maximum clock speed of up to 5.5 GHz, 32 MB L3 cache, and a 65 W TDP. Finally, the base SKU, the Ryzen 5 9600X, has only 6 cores, a maximum clock speed of up to 5.4 GHz, 32 MB L3 cache, and a 65 W TDP.

The next slide marks the flagship Zen 5 chip. The Ryzen 9 9950X goes up against Intel’s current 14th generation Core i9-14900K. In productivity and content creation tasks, the Ryzen 9 9950X showed a 7% improvement in Procyon Office, a 10% increase in Puget Photoshop, and a 21% increase in Cinebench R24 nT. More notably, it shows a 55% increase in performance in Handbrake and a 56% increase in Blender.

Interestingly, the gaming data shows marginal gains in some titles, although it highlights larger increases in others. AMD’s internal tests show that the Ryzen 9 9950X outperforms the Intel Core i9-14900K by 4% in Borderlands 3, 6% in Hitman 3 and 13% in Cyberpunk 2077. It also achieves a 16% improvement in F1 2023, a 17% gain in DOTA 2 and a 23% increase in Horizon Zero Dawn.

As mentioned, AMD is committed to extending its AM5 socket for longevity, at least much more than other vendors offer with their CPU releases and updates. As such, AMD’s Ryzen 9000 series runs on the current AM5 platform. And while Ryzen 9000 is fully backwards compatible with existing 600-series boards, AMD has also prepared two new chipsets for 800-series motherboards for Zen 5’s desktop launch. The X870E (extreme) and X870 chipsets will be featured on numerous new motherboards at launch, and a large part of Computex this week will be motherboard vendors (most of which are local Taiwanese firms) showing off their new products.

AMD offered only a few details about its X870E and X870 chipsets. It should be noted that USB 4.0 support will be standard on all X870(E) motherboards, while it was optional on the X670(E) series motherboards. The X870(E) boards will also include Wi-Fi 7 support (from 6E on the 600 series), and at least one PCIe 5.0 NVMe slot remains a must. AMD also notes that motherboards based on both platforms “have a total of 44 PCIe lanes,” which will be split between 24 lanes from the CPU and another 20 lanes coming from the chipset.

Surprisingly, it appears that PCIe 5.0 support for PCIe slots will not yet be a must-have feature for this generation of AMD’s high-end X-series motherboards. According to AMD’s press release, the X870E is “differentiated with 24 PCIe 5.0 lanes, with 16 lanes dedicated to graphics,” meaning the vanilla X870 won’t require PCIe 5.0 support. We look at AMD and motherboard manufacturers to find out more.

Looking under the hood, AMD confirmed that the new chipsets are not based on new silicon. Instead, the company uses the same design produced by ASMedia as in the X670/B650 chipsets: the Promontory 21 controller. Given that the feature sets of the newer X870E/X870 motherboards are fundamentally similar to those of the X670E/ The X670, aside from using newer external controllers like Wi-Fi 7, apparently doesn’t need much change to the chipset itself. Although given the lack of significant changes, it does beg the question of why AMD skipped a generation in its lineup (700 series anyone?) and went straight to the 800 series chipsets.

The AMD Ryzen 9000 series, including the flagship Ryzen 9 9950X (16C/32T), Ryzen 9 9900X (12C/24T), Ryzen 7 9700X (8C/16T) and the entry-level Ryzen 5 9600X (6C/12T) are expected to arrive in retail channels sometime in July 2024. AMD is not providing pricing at the time of writing.